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@BOOK{Baileybook,
  title = {Design for Embedded Image Processing on FPGAs},
  publisher = {Wiley-IEEE Press},
  year = {2011},
  author = {Donald G. Bailey},
  owner = {sfernando},
  timestamp = {2012.07.14}
}

@INPROCEEDINGS{6176632,
  author = {Bamakhrama, M.A. and Zhai, J.T. and Nikolov, H. and Stefanov, T.},
  title = {A methodology for automated design of hard-real-time embedded streaming
	systems},
  booktitle = {Design, Automation Test in Europe Conference Exhibition (DATE), 2012},
  year = {2012},
  pages = {941 -946},
  month = {march},
  issn = {1530-1591},
  keywords = {application timing requirements;embedded multiprocessor system;hard-real-time
	embedded streaming systems automated design;hard-real-time multiprocessor
	scheduling theory;schedulability analysis;state-of-the art multiprocessor
	design frameworks;system design complexity;time-consuming design
	space exploration phase;computational complexity;electronic design
	automation;embedded systems;multiprocessing systems;processor scheduling;},
  owner = {sfernando},
  timestamp = {2012.07.14}
}

@ARTICLE{Benkrid:2002:TGF:611428.611438,
  author = {Benkrid, K. and Crookes, D. and Benkrid, A.},
  title = {Towards a general framework for FPGA based image processing using
	hardware skeletons},
  journal = {Parallel Comput.},
  year = {2002},
  volume = {28},
  pages = {1141--1154},
  number = {7-8},
  month = aug,
  acmid = {611438},
  address = {Amsterdam, The Netherlands, The Netherlands},
  doi = {10.1016/S0167-8191(02)00106-0},
  issn = {0167-8191},
  issue_date = {August 2002},
  keywords = {FPGA, coprocessor, hardware skeletons, high level programming, image
	processing},
  numpages = {14},
  owner = {sfernando},
  publisher = {Elsevier Science Publishers B. V.},
  timestamp = {2012.07.14},
  url = {http://dx.doi.org/10.1016/S0167-8191(02)00106-0}
}

@PHDTHESIS{caarls_thesis,
  author = {Wouter Caarls},
  title = {Automated Design of Application-Specific Smart Camera Architectures},
  school = {Delft University of Technology, The Netherlands},
  year = {2008},
  owner = {sfernando},
  timestamp = {2012.07.14}
}

@BOOK{Cole,
  title = {Algorithmic skeletons: structured management of parallel computation},
  publisher = {MIT Press},
  year = {1991},
  author = {Cole, Murray},
  address = {Cambridge, MA, USA},
  isbn = {0-262-53086-4},
  owner = {sfernando},
  timestamp = {2012.07.31}
}

@INPROCEEDINGS{Corre,
  author = {Corre, Youenn and Diguet, Jean-Philippe and Heller, Dominique and
	Lagadec, Lo\"{\i}c},
  title = {A framework for high-level synthesis of heterogeneous MP-SoC},
  booktitle = {Proceedings of the great lakes symposium on VLSI},
  year = {2012},
  series = {GLSVLSI '12},
  pages = {283--286},
  address = {New York, NY, USA},
  publisher = {ACM},
  acmid = {2206850},
  doi = {10.1145/2206781.2206850},
  isbn = {978-1-4503-1244-8},
  keywords = {FPGA, design space exploration, embedded systems, heterogeneous MP-SoC,
	high-level synthesis},
  location = {Salt Lake City, Utah, USA},
  numpages = {4},
  owner = {sfernando},
  timestamp = {2012.07.14},
  url = {http://doi.acm.org.janus.libr.tue.nl/10.1145/2206781.2206850}
}

@BOOK{coussy2008high,
  title = {High-level synthesis: from algorithm to digital circuit},
  publisher = {Springer Verlag},
  year = {2008},
  author = {Coussy, P. and Morawiec, A.},
  owner = {sfernando},
  timestamp = {2012.07.14}
}

@ARTICLE{5247153,
  author = {Gerstlauer, A. and Haubelt, C. and Pimentel, A.D. and Stefanov, T.P.
	and Gajski, D.D. and Teich, J.},
  title = {Electronic System-Level Synthesis Methodologies},
  journal = {Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions
	on},
  year = {2009},
  volume = {28},
  pages = {1517 -1530},
  number = {10},
  month = {oct. },
  doi = {10.1109/TCAD.2009.2026356},
  issn = {0278-0070},
  keywords = {electronic system-level synthesis methodology;hardware boundary;software
	boundary;electronics industry;hardware-software codesign;network
	synthesis;},
  owner = {sfernando},
  timestamp = {2012.07.29}
}

@ARTICLE{Ha:2008:PHC:1255456.1255461,
  author = {Ha, Soonhoi and Kim, Sungchan and Lee, Choonseung and Yi, Youngmin
	and Kwon, Seongnam and Joo, Young-Pyo},
  title = {PeaCE: A hardware-software codesign environment for multimedia embedded
	systems},
  journal = {ACM Trans. Des. Autom. Electron. Syst.},
  year = {2008},
  volume = {12},
  pages = {24:1--24:25},
  number = {3},
  month = may,
  acmid = {1255461},
  address = {New York, NY, USA},
  articleno = {24},
  doi = {10.1145/1255456.1255461},
  issn = {1084-4309},
  issue_date = {August 2007},
  keywords = {Hardware-software codesign, design-space exploration, embedded systems,
	hardware-software cosimulation, model-based design},
  numpages = {25},
  owner = {sfernando},
  publisher = {ACM},
  timestamp = {2012.07.14},
  url = {http://doi.acm.org.janus.libr.tue.nl/10.1145/1255456.1255461}
}

@MASTERSTHESIS{johanthesis,
  author = {Johan Hendriks},
  title = {High Level Synthesis: Performance Analysis and Code Optimization},
  school = {Eindhoven University Of Technology, The Netherlands},
  year = {2012},
  owner = {sfernando},
  timestamp = {2012.07.14}
}

@INPROCEEDINGS{mampsROEL,
  author = {Roel Jordans and Firew Siyoum and Sander Stuijk and Akash Kumar and
	Henk Corporaal},
  title = {{An Automated Flow to Map Throughput Constrained Applications to
	a MPSoC}},
  booktitle = {Bringing Theory to Practice: Predictability and Performance in Embedded
	Systems},
  year = {2011},
  volume = {18},
  pages = {47--58},
  address = {Dagstuhl, Germany},
  annote = {Keywords: design flow automation, multi-processor system-on-chip,
	throughput constrained, synchronous data-flow graphs},
  doi = {http://dx.doi.org/10.4230/OASIcs.PPES.2011.47},
  isbn = {978-3-939897-28-6},
  issn = {2190-6807},
  owner = {sfernando},
  timestamp = {2012.07.14},
  url = {http://drops.dagstuhl.de/opus/volltexte/2011/3081},
  urn = {urn:nbn:de:0030-drops-30819}
}

@ARTICLE{Keinert:2009:SAE:1455229.1455230,
  author = {Keinert, Joachim and Streub\&uhorbar;hr, Martin and Schlichter, Thomas
	and Falk, Joachim and Gladigau, Jens and Haubelt, Christian and Teich,
	J\&uhorbar;rgen and Meredith, Michael},
  title = {SystemCoDesigner-An automatic ESL synthesis approach by design space
	exploration and behavioral synthesis for streaming applications},
  journal = {ACM Trans. Des. Autom. Electron. Syst.},
  year = {2009},
  volume = {14},
  pages = {1:1--1:23},
  number = {1},
  month = jan,
  acmid = {1455230},
  address = {New York, NY, USA},
  articleno = {1},
  doi = {10.1145/1455229.1455230},
  issn = {1084-4309},
  issue_date = {January 2009},
  keywords = {System design, hardware/software codesign},
  numpages = {23},
  owner = {sfernando},
  publisher = {ACM},
  timestamp = {2012.07.14},
  url = {http://doi.acm.org/10.1145/1455229.1455230}
}

@ARTICLE{mampsTODAES,
  author = {Kumar, Akash and Fernando, Shakith and Ha, Yajun and Mesman, Bart
	and Corporaal, Henk},
  title = {Multiprocessor systems synthesis for multiple use-cases of multiple
	applications on FPGA},
  journal = {ACM Trans. Des. Autom. Electron. Syst.},
  year = {2008},
  volume = {13},
  pages = {40:1--40:27},
  number = {3},
  month = jul,
  acmid = {1367049},
  address = {New York, NY, USA},
  articleno = {40},
  doi = {10.1145/1367045.1367049},
  issn = {1084-4309},
  issue_date = {July 2008},
  keywords = {FPGA, design exploration, multi-application, multimedia systems, multiple
	use-cases, multiprocessor systems, synchronous data-flow graphs},
  numpages = {27},
  owner = {sfernando},
  publisher = {ACM},
  timestamp = {2012.07.23},
}

@INPROCEEDINGS{mampsFPL,
  author = {Kumar, A. and Fernando, S. and Yajun Ha and Mesman, B. and Corporaal,
	H.},
  title = {Multi-Processor System-Level Synthesis for Multiple Applications
	on Platform FPGA},
  booktitle = {Field Programmable Logic and Applications, 2007. FPL 2007. International
	Conference on},
  year = {2007},
  pages = {92 -97},
  month = {aug.},
  doi = {10.1109/FPL.2007.4380631},
  keywords = {FPGA mapping;JPEG decoder;buffer-throughput trade-off;design space
	exploration;field programmable gate arrays;multiprocessor system-level
	synthesis;multiprocessor systems-on-chip;platform FPGA synthesis;field
	programmable gate arrays;system-on-chip;},
  owner = {sfernando},
  timestamp = {2012.07.14}
}

@TECHREPORT{Nugteren2011,
  author = {Cedric Nugteren and Henk Corporaal},
  title = {{A Modular and Parameterisable Classification of Algorithms}},
  institution = {Eindhoven University of Technology},
  year = {2011},
  number = {No. ESR-2011-02},
  owner = {sfernando},
  timestamp = {2012.07.14}
}

@TECHREPORT{itrs2011,
  author = {INTERNATIONAL TECHNOLOGY ROADMAP FOR SEMICONDUCTORS},
  title = {ITRS, 2011-2026 Road Map, System Drivers},
  institution = {INTERNATIONAL TECHNOLOGY ROADMAP FOR SEMICONDUCTORS},
  year = {2011},
  owner = {sfernando},
  timestamp = {2012.07.14}
}

@ARTICLE{amit1,
  author = {Singh, Amit Kumar and Kumar, Akash and Thambipillai, Srikanthan},
  title = {Accelerating Throughput-aware Run-time Mapping for Heterogeneous
	MPSoCs},
  journal = {ACM Trans. Des. Autom. Electron. Syst.},
  year = {2012},
  acmid = {1367049},
  address = {New York, NY, USA},
  articleno = {40},
  issn = {1084-4309},
  issue_date = {July 2008},
  numpages = {27},
  owner = {sfernando},
  publisher = {ACM},
  timestamp = {2012.07.23}
}

@PHDTHESIS{sander_thesis,
  author = {Sander Stuijk},
  title = {Predictable Mapping of Streaming Applications on Multiprocessors},
  school = {Eindhoven University of Technology, The Netherlands},
  year = {2007},
  owner = {sfernando},
  timestamp = {2012.07.14}
}

@INPROCEEDINGS{Stuijk06acsd,
  author = {S. Stuijk and M.C.W. Geilen and T. Basten},
  title = {{SDF}$^3$: {SDF For Free}},
  booktitle = {Application of Concurrency to System Design, 6th International Conference,
	ACSD 2006, Proceedings},
  year = {2006},
  pages = {276--278},
  month = {June},
  publisher = {IEEE Computer Society Press, Los Alamitos, CA, USA},
  doi = {10.1109/ACSD.2006.23},
  location = {Turku, Finland},
  owner = {sfernando},
  timestamp = {2012.07.30},
  url = {http://www.es.ele.tue.nl/sdf3}
}

@ELECTRONIC{mamps_website,
  year = {2013},
  title = {{MAMPSx}},
  url = {http://www.es.ele.tue.nl/mamps/},
  key = {ee4218},
  owner = {sfernando},
  timestamp = {2012.06.21}
}

@ELECTRONIC{spacecodesign,
  year = {2013},
  title = {{Space CoDesign Systems}},
  url = {http://www.spacecodesign.com/},
  key = {ee4218},
  owner = {sfernando},
  timestamp = {2012.06.21}
}

@ELECTRONIC{xilinx_website,
  year = {2013},
  title = {{Xilinx}},
  url = {http://www.xilinx.com/},
  key = {ee4218},
  owner = {sfernando},
  timestamp = {2012.06.21}
}

@ELECTRONIC{zedboard,
  year = {2013},
  title = {{ZEDBoard}},
  url = {http://www.zedboard.org/},
  key = {ee4218},
  owner = {sfernando},
  timestamp = {2012.06.21}
}


@ELECTRONIC{google_glass,
  year = {2013},
  title = {{Google Glass}},
  url = {http://www.google.com/glass/start/how-it-feels/},
  key = {ee4218},
  owner = {sfernando},
  timestamp = {2013.04.13}
}


@ELECTRONIC{ucla_hls_store,
  year = {2013},
  title = {{Open-Source HLS Accelerator Store}},
  url = {ttp://cadlab.cs.ucla.edu/accelerator_store.html},
  key = {ee4218},
  owner = {sfernando},
  timestamp = {2013.04.13}
}

h
@inproceedings{DarkSilicon,
 author = {Esmaeilzadeh, Hadi and Blem, Emily and St. Amant, Renee and Sankaralingam, Karthikeyan and Burger, Doug},
 title = {Dark silicon and the end of multicore scaling},
 booktitle = {Proceedings of the 38th annual international symposium on Computer architecture},
 series = {ISCA '11},
 year = {2011},
 isbn = {978-1-4503-0472-6},
 location = {San Jose, California, USA},
 pages = {365--376},
 numpages = {12},
 doi = {10.1145/2000064.2000108},
 acmid = {2000108},
 publisher = {ACM},
 address = {New York, NY, USA},
 keywords = {dark silicon, modeling, multicore, power, technology scaling},
} 

@inproceedings{qscores,
  title={QsCores: trading dark silicon for scalable energy efficiency with quasi-specific cores},
  author={Venkatesh, Ganesh and Sampson, Jack and Goulding-Hotta, Nathan and Venkata, Sravanthi Kota and Taylor, Michael Bedford and Swanson, Steven},
  booktitle={Proceedings of the 44th Annual IEEE/ACM International Symposium on Microarchitecture},
  pages={163--174},
  year={2011},
  organization={ACM}
}

@article{nieuwland2002c,
  title={C-HEAP: A heterogeneous multi-processor architecture template and scalable and flexible protocol for the design of embedded signal processing systems},
  author={Nieuwland, Andr{\'e} and Kang, Jeffrey and Gangwal, Om Prakash and Sethuraman, Ramanathan and Bus{\'a}, Natalino and Goossens, Kees and Peset Llopis, Rafael and Lippens, Paul},
  journal={Design Automation for Embedded Systems},
  volume={7},
  number={3},
  pages={233--270},
  year={2002},
  publisher={Springer}
}

@article{hristo2008automated,
  title={Automated Integration of Dedicated Hardwired IP Cores in Heterogeneous MPSoCs Designed with ESPAM},
  author={Hristo, Nikolov and Todor, Stefanov and others},
  journal={EURASIP Journal on Embedded Systems},
  volume={2008},
  year={2008},
  publisher={Hindawi Publishing Corporation}
}

@inproceedings{lee1987synchronous,
  title={Synchronous data flow: Describing signal processing algorithm for parallel computation},
  author={Lee, Edward A and Messerschmitt, David G},
  booktitle={Proceedings of the 32nd IEEE Computer Society International Conference (COMPCON’87)},
  pages={310--315},
  year={1987}
}

@inproceedings{ghamarian2006throughput,
  title={Throughput analysis of synchronous data flow graphs},
  author={Ghamarian, Amir Hossein and Geilen, MCW and Stuijk, Sander and Basten, Twan and Moonen, AJM and Bekooij, MJG and Theelen, BD and Mousavi, Mohammad Reza},
  booktitle={Application of Concurrency to System Design, 2006. ACSD 2006. Sixth International Conference on},
  pages={25--36},
  year={2006},
  organization={IEEE}
}

@article{LiangHLS,
 author = {Liang, Yun and Rupnow, Kyle and Li, Yinan and Min, Dongbo and Do, Minh N. and Chen, Deming},
 title = {High-level synthesis: productivity, performance, and software constraints},
 journal = {JECE},
 issue_date = {January 2012},
 volume = {2012},
 month = jan,
 year = {2012},
 issn = {2090-0147},
 pages = {1:1--1:1},
 articleno = {1},
 numpages = {1},
 url = {http://dx.doi.org/10.1155/2012/649057},
 doi = {10.1155/2012/649057},
 acmid = {2215537},
 publisher = {Hindawi Publishing Corp.},
 address = {New York, NY, United States},
}

@incollection{Corre2013,
year={2013},
isbn={978-3-642-36811-0},
booktitle={Reconfigurable Computing: Architectures, Tools and Applications},
volume={7806},
series={Lecture Notes in Computer Science},
editor={Brisk, Philip and Figueiredo Coutinho, JoséGabriel and Diniz, PedroC.},
doi={10.1007/978-3-642-36812-7_15},
title={Fast Template-Based Heterogeneous MPSoC Synthesis on FPGA},
publisher={Springer Berlin Heidelberg},
author={Corre, Youenn and Diguet, Jean-Philippe and Lagadec, Loïc and Heller, Dominique and Blouin, Dominique},
pages={154-166}
}

@article{JiBaNuThPi13,
author={Z. J. Jia and T. Bautista and A. Nunez and M. Thompson and Andy D. Pimentel},
year={2013},
journal={(to appear) ACM Transactions on Embedded Computing Systems (ACM TECS)},
title={A System-level Infrastructure for Multi-dimensional MP-SoC Design Space Co-exploration},
}

@ARTICLE{6172642, 
author={Teich, J.}, 
journal={Proceedings of the IEEE}, title={Hardware/Software Codesign: The Past, the Present, and Predicting the Future}, 
year={2012}, 
volume={100}, 
number={Special Centennial Issue}, 
pages={1411-1430}, 
keywords={electronic design automation;embedded systems;hardware-software codesign;virtual prototyping;complex electronic systems;concurrent design;design constraints;hardware components;hardware-software codesign;software components;time-to-market frame;Complexity theory;Computer architecture;Consumer electronics;Hardware design languages;Simulation;Software development;System-on-a-chip;Cosimulation;cosynthesis;coverification;design space exploration;electronic system level (ESL);hardware/software codesign;virtual prototyping}, 
doi={10.1109/JPROC.2011.2182009}, 
ISSN={0018-9219},}

@inproceedings{Akesson:2007:PPS:1289816.1289877,
 author = {Akesson, Benny and Goossens, Kees and Ringhofer, Markus},
 title = {Predator: a predictable SDRAM memory controller},
 booktitle = {Proceedings of the 5th IEEE/ACM international conference on Hardware/software codesign and system synthesis},
 series = {CODES+ISSS '07},
 year = {2007},
 isbn = {978-1-59593-824-4},
 location = {Salzburg, Austria},
 pages = {251--256},
 numpages = {6},
 acmid = {1289877},
 publisher = {ACM},
 address = {NY, USA},
 keywords = {SDRAM, memory controller, predictability, system-on-chip},
} 

@misc{stuijk2007predictable,
  title={Predictable mapping of streaming applications on multiprocessors},
  author={Stuijk, Sander},
  journal={Dissertation Abstracts International},
  volume={68},
  number={04},
  year={2007}
}

@incollection{spacereview,
year={2010},
isbn={978-1-4419-0964-0},
booktitle={ESL Models and their Application},
series={Embedded Systems},
title={Codesign Experiences Based on a Virtual Platform},
publisher={Springer US},
author={Bailey, Brian and Martin, Grant},
pages={273-308},
language={English}
}

@article{shabbir2010mpsoc,
  title={CA-MPSoC: An automated design flow for predictable multi-processor architectures for multiple applications},
  author={Shabbir, Ashan and Kumar, A and Stuijk, S and Mesman, B and Corporaal, H},
  journal={Journal of Systems Architecture},
  volume={56},
  number={7},
  pages={265--277},
  year={2010},
  publisher={Elsevier}
}

@article{he2013,
  title={Efficient Communication Support in Predictable Heterogeneous MPSoC Designs for Streaming Applications},
  author={He, Y. and She, D and Stuijk, S and Corporaal, H},
  journal={Journal of Systems Architecture (to appear)},
  doi={10.1016/j.sysarc.2013.04.005}, 
  year={2013},
}

@incollection{he2011acivs,
   author = {Yifan He and Zhenyu Ye and Dongrui She and Bart Mesman and Henk Corporaal},
   title = {Feasibility Analysis of Ultra High Frame Rate Visual Servoing on FPGA and SIMD Processor},
   booktitle = {Advanced Concepts for Intelligent Vision Systems},
   year = {2011}
}

@inproceedings{Wiggers2007,
 author = {Wiggers, Maarten H. and Bekooij, Marco J. G. and Smit, Gerard J. M.},
 title = {Modelling run-time arbitration by latency-rate servers in dataflow graphs},
 booktitle = {Proceedingsof the 10th international workshop on Software \& compilers for embedded systems},
 series = {SCOPES '07},
 year = {2007},
 location = {Nice, France},
 pages = {11--22},
 numpages = {12},
 doi = {10.1145/1269843.1269846},
 acmid = {1269846},
 publisher = {ACM},
 address = {NY, USA},
} 

